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Vol.54, No.3, 204 ~ 210, 2016
Title
Effect of Polishing Process of a Semiconductor Wafer on the Fracture Mechanics of Diced Chips
이성민 Seong-min Lee
Abstract
This article shows how the adoption of polishing as the back-lapping process of semiconductor wafers influences the flexural fracture strength of their individually diced chips. According to the experimental results of this study, a polishing powder with a particle size of approximately 1 um in diameter can meaningfully reduce the fracture strength of chips with a thickness of 50 um. Particularly, when the diced chips have polishing-induced defects formed along a (110)-dicing plane, they reveal the lowest fracture strength. An in-situ examination details how polishing causes sharp notches on the back surface of the chips which provide preferential sites for chip cracking during a flexural test.
Key Words
semiconductor, silicon wafer, chip, fracture, reliability
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